VLSI implementation of Reed-Solomon encoder algorithm for communication systems

Amiya Ranjan Dash; Trupti Ranjan Lenka

doi:10.3103/S0735272713090033

Authors

Amiya Ranjan Dash National Institute of Science and Technology, Berhampur, India
Trupti Ranjan Lenka National Institute of Technology, Silchar, India

DOI:

https://doi.org/10.3103/S0735272713090033

Keywords:

Reed-Solomon, encoder

Abstract

Reed Solomon codes are used to identify and correct data errors in transmission and storage systems. In this paper we designed a compact RS(255, 223) encoder structure based on analysis of the Reed-Solomon (RS) coding theory used in deep space communications. The encoder is implemented with 32 optimized finite multipliers, of which the redundant operations are reduced to minimize the number of modulo 2 additions or XOR gates based on analyzing the structure of multipliers in RS encoder that are simple and can ensure high speed operations. The simulation results show that the designed structure has advantages such as high efficiency and low complexity ensuring good coding performance.

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