Procedure for building a MOS transistor high frequency small-signal model
DOI:
https://doi.org/10.3103/S0735272710070034Keywords:
MOSFET, RF IC design, small-signal MOSFET modeling, BSIM, parameter extractionAbstract
This paper examines a procedure for building a MOS transistor small-signal equivalent circuit for the high frequency range. Procedures are proposed for determining the ac and dc parameters. The simulation results and experimental data are also presented.
References
- Y. Cheng, M. J. Deen, and C. Chen, “MOSFET Modeling for RF IC Design,” IEEE Trans. Electron Devices 52, No. 7, 1286 (2005).
- C. Enz, “An MOS Transistor Model for RF IC Design Valid in All Regions of Operation,” IEEE Trans. Microwave Theory Tech. 50, No. 1, 342 (2002).
- C. Enz and Y. Cheng, “MOS Transistor Modeling for RF IC Design,” IEEE J. Solid-State Circuits 35, No. 2, 186 (2000).
- Y. Cheng, “High Frequency Small–Signal AC and Noise Modeling of MOSFET for RF IC Design,” IEEE Trans. Electron Devices 49, No. 3, 400 (2002).
- BSIM3v3 Manual (UC Berkley, 2005), Ch. 4, pp. 5–23.
- W. Y. Choi, H. Kim, B. Lee, et al., “Park Stable Threshold Voltage Extraction Using Tikhonov’s Regularization Theory,” IEEE Trans. Electron Devices 51, No. 11, 1833 (2004).
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Published
2010-07-03
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Research Articles