Comparative analysis of CMOS adders circuits based on 10 transistors
DOI:
https://doi.org/10.3103/S0735272714090040Keywords:
CMOS, full single-bit adder, logic function, CMOS circuitAbstract
Development of digital signal processing devices has led to appearance of a series of CMOS circuit designs of arithmetic and logic blocks with a small number of transistors. In this paper we suggest a classification of full single-bit CMOS adders, circuits of which consist of 10 transistors. The comparison of main characteristics of adders has been carried out based on the results of circuit simulation for 0.18-micron MOS technology and the most promising implementations have been marked out.
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