Comments on "VLSI implementation of Reed-Solomon encoder algorithm for communication systems"

Jagannath Samanta; Jaydeb Bhaumik

doi:10.3103/S0735272714070061

Authors

Jagannath Samanta Haldia Institute of Technology, Haldia, India https://orcid.org/0000-0003-1168-1166
Jaydeb Bhaumik Jadavpur University, Kolkata, India https://orcid.org/0000-0001-5382-9128

DOI:

https://doi.org/10.3103/S0735272714070061

Keywords:

Reed Solomon encoder, generator polynomial, field polynomial, constant multiplier and XOR gate

Abstract

This comment points out the four inaccurate equations and incorrect output parity values computed using RS(255, 223) encoder algorithm. The four correct equations and correct output parity values for the given input are provided here.

Author Biography

Jaydeb Bhaumik, Jadavpur University, Kolkata

(2014) Haldia Institute of Technology

References

DASH, A.R.; LENKA, T.R. VLSI implementation of Reed-Solomon encoder algorithm for communication systems. Radioelectron. Commun. Syst., v.56, n.9, p.441–447, 2013. DOI: http://dx.doi.org/10.3103/S0735272713090033.

Comments on "VLSI implementation of Reed-Solomon encoder algorithm for communication systems"

Authors

DOI:

Keywords:

Abstract

Author Biography

Jaydeb Bhaumik, Jadavpur University, Kolkata

References

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