DOI: https://doi.org/10.3103/S0735272720050064
Open Access Open Access  Restricted Access Subscription Access
Logarithmic AFC of I/Q demodulators of 8-th order with different coefficients

Synthesis method of procedure for odd-order I/Q demodulation based on replacing multistage with equivalent single-stage demodulation schemes

Vadym I. Slyusar, Pavlo Serdiuk

Abstract


A method of synthesis of odd-order I/Q demodulators based on replacing the multistage demodulation schemes with equivalent single-stage ones is proposed. The calculation of coefficients of single-stage odd-order I/Q demodulator, which is equivalent to multistage scheme in terms of the waveform of its amplitude-frequency characteristic (AFC), is based on the sample-wise analysis of the process of forming the response of the demodulator output stage that involves the sampling the harmonic signal voltages at the output of analog-to-digital converter (ADC). An example of synthesis of 11-sample former of quadrature components is considered for illustrating the application peculiarities of the method proposed for synthesis of odd-order I/Q demodulators. The comparative results of its AFC calculations are presented. The analytical description of the response of the specified unit in terms of the coefficients of even-order I/Q demodulators forming the multistage scheme has been derived. A number of regularities intrinsic to coefficients of odd-order I/Q demodulators was established, including the regularities characterizing the dependence of their dynamic range on values of weighting coefficients of the initial multistage scheme.

Keywords


I/Q demodulator; amplitude-frequency characteristic; AFC; analog-to-digital converter; ADC; quadrature components

Full Text:

PDF

References


V. P. O’Neil, C. Ryan, and C. Weitzel, “Monolithic Gallium Arsenide I-Q Demodulator,” in Microwave and Millimeter-Wave Monolithic Circuits, vol. 84, pp. 14–18, doi: https://doi.org/10.1109/MCS.1984.1113618.

C. Ziomek and P. Corredoura, “Digital I/Q demodulator,” in Proceedings of the IEEE Particle Accelerator Conference, 1995, vol. 4, pp. 2663–2665, doi: https://doi.org/10.1109/pac.1995.505652.

D. Bernal, P. Closas, and J. A. Fernández-Rubio, “Digital I&Q demodulation in array processing: Theory and implementation,” in 2008 16th European Signal Processing Conference, 2008, uri: https://ieeexplore.ieee.org/document/7080413.

J. E. Eklund and R. Arvidsson, “A multiple sampling, single A/D conversion technique for I/Q demodulation in CMOS,” IEEE J. Solid-State Circuits, vol. 31, no. 12, pp. 1987–1994, 1996, doi: https://doi.org/10.1109/4.545822.

V. Slysar and P. Serdjuk, “Multistage I/Q-demodulate OFDM signals at their one channel analog-digital transformation,” Zbirnyk Nauk. Pr. VITI NTUU KPI, no. 1, p. 85, 2013.

V. Slyusar and E. Zhivilo, “The synthesys of equivalence digital filters for tandem decimation on base I/Q-demodulation,” in 2017 4th International Scientific-Practical Conference Problems of Infocommunications Science and Technology, PIC S and T 2017 - Proceedings, 2017, vol. 2018-January, pp. 449–451, doi: https://doi.org/10.1109/INFOCOMMST.2017.8246436.

M. Mfana and A. N. Hasan, “Soft-Core Architecture for Odd / Even Order Sampling I / Q Demodulator with Dual-Port Block Memory Considerations,” no. September, pp. 1–11, 2019, doi: https://doi.org/10.20944/preprints201909.0014.v1.

J. Mitra and T. K. Nayak, “An FPGA-based phase measurement system,” IEEE Trans. Very Large Scale Integr. Syst., vol. 26, no. 1, pp. 133–142, 2018, doi: https://doi.org/10.1109/TVLSI.2017.2758807.

I. L. Syllaios, “Hybrid and Delta;Σ Programmable Phase/Frequency Detector for IoT Chipsets,” in Proceedings - IEEE International Symposium on Circuits and Systems, 2018, vol. 2018-May, doi: https://doi.org/10.1109/ISCAS.2018.8351733.

P. I. Puzyrev, K. V. Semenov, and S. A. Zavyalov, “Spurious-free dynamic range of cordic based digital quadrature demodulator,” in International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices, EDM, 2018, vol. 2018-July, pp. 167–171, doi: https://doi.org/10.1109/EDM.2018.8434980.

J. Kang et al., “A System-on-Chip Solution for Point-of-Care Ultrasound Imaging Systems: Architecture and ASIC Implementation,” IEEE Trans. Biomed. Circuits Syst., vol. 10, no. 2, pp. 412–423, 2016, doi: https://doi.org/10.1109/TBCAS.2015.2431272.

A. Mandal, R. Mishra, and M. R. Nagar, “Implementation of complex digital PLL for phase detection in software defined radar,” Radioelectron. Commun. Syst., vol. 59, no. 4, pp. 151–162, 2016, doi: https://doi.org/10.3103/S0735272716040014.







© Radioelectronics and Communications Systems, 2004–2020
When you copy an active link to the material is required
ISSN 1934-8061 (Online), ISSN 0735-2727 (Print)
tel./fax +38044 204-82-31, 204-90-41