DOI: https://doi.org/10.3103/S0735272719030051
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Chip micrograph and FEA layout

Ultra-low power high-input impedance subthreshold CMOS neural front-end amplifier

Sadeque Reza Khan, Iram Nadeem

Abstract


An ultra-low power, voltage-mode front-end amplifier (FEA) for neural applications featuring subthreshold design is presented. This has been a topic of much research in implantable medical prosthetic devices during the past few decades to monitor and treat the neural disorders such as hearing or sight dysfunctions, epilepsy, Parkinson’s disease, paralysis. The FEA performs a critical signal detection operation in neural monitoring systems to ensure the biosignal fidelity. A matched double-MOS feedback technique is used to compensate the input leakage currents generated by low noise amplifier in the form of integrated circuit (IC), which is the primary reason for immense signal leakage in the input bias network. Therefore, this loop topology ensures that FEA maintains high impedance across a wide range of input frequency. The proposed FEA is implemented by using an SK Hynix 0.18 µm CMOS process. This IC consumes 320 nW in the area of 0.016 mm2 and achieves the input impedance of 44.9 GΩ, and the input-referred noise of 153 nV/Hz1/2.

Keywords


FEA; subthreshold; double-MOS; leakage current; input impedance

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References


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