High efficiency cross-coupled charge pump circuit with four-clock signals

Minglin Ma; Xinglong Cai; Jin Jiang; Yichuang Sun

doi:10.3103/S073527271812004X

Authors

Minglin Ma Xiangtan University, China; University of Hertfordshire, United Kingdom https://orcid.org/0000-0003-4599-8479
Xinglong Cai Xiangtan University, China
Jin Jiang Xiangtan University, China
Yichuang Sun University of Hertfordshire, United Kingdom

DOI:

https://doi.org/10.3103/S073527271812004X

Keywords:

cross-coupled charge pump, reversion power loss, ripple voltage, four-clock signal

Abstract

A fully integrated cross-coupled charge pump circuit for boosting dc-to-dc converter applications with four-clock signals has been proposed. With the new clock scheme, this charge pump eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the power supply voltage for solving the gate-oxide overstress problem in the conventional charge pump circuits and enhancing the reliability. This proposed charge pump circuit does not require any extra level shifter; therefore, the power efficiency is increased. The proposed charge pump circuit has been simulated using Spectre in the TSMC 0.18 µm CMOS process. The simulation results show that the maximum voltage conversion efficiency of the new 3-stage cross-coupled circuit with an input voltage of 1.5 V is 99.8%. According to the comparison results of the conventional pump and the enhanced charge pump proposed, the output ripple voltage has been significantly reduced.

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