Open Access Open Access  Restricted Access Subscription Access
Comparison of output ripple voltage of different 3-stage charge pumps with different input voltage

High efficiency cross-coupled charge pump circuit with four-clock signals

Minglin Ma, Xinglong Cai, Jin Jiang, Yichuang Sun


A fully integrated cross-coupled charge pump circuit for boosting dc-to-dc converter applications with four-clock signals has been proposed. With the new clock scheme, this charge pump eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the power supply voltage for solving the gate-oxide overstress problem in the conventional charge pump circuits and enhancing the reliability. This proposed charge pump circuit does not require any extra level shifter; therefore, the power efficiency is increased. The proposed charge pump circuit has been simulated using Spectre in the TSMC 0.18 µm CMOS process. The simulation results show that the maximum voltage conversion efficiency of the new 3-stage cross-coupled circuit with an input voltage of 1.5 V is 99.8%. According to the comparison results of the conventional pump and the enhanced charge pump proposed, the output ripple voltage has been significantly reduced.


cross-coupled charge pump; reversion power loss; ripple voltage; four-clock signal

Full Text:



DICKSON, J.F. “On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique,” IEEE J. Solid-State Circuits, v.11, n.3, p.374, 1976. DOI:

WU, J.T.; CHANG, K.-L. “MOS charge pumps for low-voltage operation,” IEEE J. Solid-State Circuits, v.33, n.4, p.592, 1998. DOI:

KER, M.-D.; CHEN, S.-L.; TSAI, C.S. “Design of charge pump circuit with consideration of gate-oxide reliability in low-voltage CMOS processes,” IEEE J. Solid-State Circuits, v.41, n.5, p.1100, 2006. DOI:

LEE, H.; MOK, P.K.T. “Switching noise and shoot-through current reduction techniques for switched-capacitor voltage doubler,” IEEE J. Solid-State Circuits, v.40, n.5, p.1136, 2005. DOI:

DAS, T.; PRASAD, S.; DAM, S.; MANDAL, P. “A pseudo cross-coupled switch-capacitor based DC-DC boost converter for high efficiency and high power density,” IEEE Trans. Power Electronics, v.29, n.11, p.5961, 2014. DOI:

KIM, J.-Y.; PARK, S.-J.; KWON, K.-W.; KONG, B.-S.; CHOI, J.-S.; JUN, Y.-H. “CMOS charge pump with no reversion loss and enhanced drivability,” IEEE Trans. Very Large Scale Integration Systems, v.22, n.6, p.1441, 2014. DOI:

MUI, T.W.; HO, M.; MAK, K.H.; GUO, J.; CHEN, H.; LEUNG, K.N. “An area-efficient 96.5%-peak-efficiency cross-coupled voltage doubler with minimum supply of 0.8 V,” IEEE Trans. Circuits Systems II: Express Briefs, v.61, n.9, p.656, 2014. DOI:

© Radioelectronics and Communications Systems, 2004–2019
When you copy an active link to the material is required
ISSN 1934-8061 (Online), ISSN 0735-2727 (Print)
tel./fax +38044 204-82-31, 204-90-41